发明名称 |
CDS circuit and analog-digital converter using dithering, and image sensor having same |
摘要 |
A correlated double sampling circuit includes a first input terminal receiving a ramp signal having first and second ramp sections, a second input terminal receiving a pixel signal, and a comparing circuit comparing the ramp signal with the pixel signal to generate an output signal, wherein the comparing circuit changes a point in time at which the output signal logically transitions during the first ramp section and the second ramp section in response to an applied dithering enable signal. |
申请公布号 |
US8957994(B2) |
申请公布日期 |
2015.02.17 |
申请号 |
US201313835065 |
申请日期 |
2013.03.15 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Jakobson Claudio |
分类号 |
H04N5/217;H04N5/378;H03K5/24;H03M1/06;H04N5/357;H03M1/12;H03M1/56 |
主分类号 |
H04N5/217 |
代理机构 |
Volentine & Whitt, PLLC |
代理人 |
Volentine & Whitt, PLLC |
主权项 |
1. A correlated double sampling (CDS) circuit comprising:
a first input terminal that receives a ramp signal comprising a first ramp section and a second ramp section different from the first ramp section, a second input terminal that receives a pixel signal, and an output terminal that provides an output signal; and a comparing circuit connected between the first and second input terminals and the output terminal, receiving a dithering enable signal, and configured to compare the ramp signal with the pixel signal to generate the output signal, wherein the comparing circuit is further configured to change a point in time at which the output signal logically transitions during the first ramp section and the second ramp section in response to the dithering enable signal. |
地址 |
Suwon-si, Gyeonggi-do KR |