| 摘要 |
本发明提供一种配线基板A，系包括：绝缘层3，下面具有下层导体5；复数个半导体元件连接焊垫10，配列成格子状于绝缘层3上的四角形状的半导体元件搭载部1a内；通孔7a，以前述下层导体5为底面而形成在半导体元件连接焊垫10下的绝缘层3；及通孔导体9a，填充于通孔7a内，且与半导体元件连接焊垫10形成一体；且该配线基板也包含：补强用通孔7b，形成在半导体元件搭载部1a内之角部且比半导体元件连接焊垫10之配列区域1b更外侧之区域的绝缘层3，且以下层导体5为底面；及补强用通孔导体9b，形成于补强用通孔7b内。; a plurality of semiconductor element connection pads 10 arranged in a grid configuration within a rectangular semiconductor element mounting area 1a on the insulation layer 3; via holes 7a formed in the insulation layer 3 underneath the semiconductor element connection pads 10, the via holes 7a having a bottom constituted by the lower layer conductors 5; and via conductors 9a formed to fill the via holes 7a and to be integrated with the semiconductor connection pads 10. The wiring board also includes reinforcing via holes 7b and reinforcing via conductors 9b, the reinforcing via holes 7b being formed in a region of the insulation layer 3 in the outside of an array region 1b of the semiconductor connection pads 10 in a corner portion of the semiconductor element mounting portion 1a. |
