| 摘要 |
<p>The present invention relates to a logic circuit which uses multiple XOR gates to divide the polynomial X^(n-1) in polynomial P to obtain remainder of computation of dividing the polynomial X^n by a polynomial P according to the XOR logic from the remainder. The logic circuits can be continuously arranged in the vertical direction to obtain the remainder of the XOR division of the polynomial X^(n+z) by the polynomial P from the remainder of the XOR division of the X^n by the polynomial P. The logic circuit can eliminate the common sub-expressions to simplify the logic circuit.</p> |
