| 摘要 |
<p>PROBLEM TO BE SOLVED: To prevent an increase in inter-gate-drain capacitance while reducing gate parasitic resistance.SOLUTION: A semiconductor device having a gate finger structure includes first to fifth signal wiring lines. The first signal wiring line is provided on both ends of a plurality of gate terminals, is connected to one end of one gate terminal, and is provided in a direction parallel to a gate width direction. The second signal wiring line is provided in a direction orthogonal to the gate width direction in a region outside an active region, and is connected to the first signal wiring line. The third signal wiring line is connected to drains in the active region, is provided in a direction orthogonal to the gate width direction, and has a smaller line width than the gate width. The fourth signal wiring line is connected to sources and is provided in a direction parallel to the gate width direction. The fifth signal wiring line is connected to the fourth signal wiring line and is provided so as not to be overlapped with the second signal wiring line.</p> |
