| 摘要 |
The present invention shortens the diffusion time when forming an isolation region without compromising strength against wafer cracks. Multiple circular holes (4a, 4b) are discontinuously and intermittently arranged in juxtaposition with one another on both surfaces of a wafer along a scribe line (SL) between adjacent semiconductor devices, and single conductivity-type (p-type in this mode) isolation diffusion layers (5a, 5b) for element isolation are formed around the circular holes (4a, 4b) in a manner such that the isolation diffusion layers (5a, 5b) reach the center part in the thickness direction from both surfaces of the wafer, and in a manner such that at least a portion of the isolation diffusion layers (5a, 5b) overlap with one another between adjacent holes and between the top and bottom surfaces. |
