发明名称 VIDEO DISPLAY APPARATUS AND VIDEO DISPLAY METHOD
摘要 According to an embodiment, an information processor includes a first decoder, a controller and a display unit. The first decoder decodes the first video encoded data at a first speed to generate a first video. When the first video encoded data is received earlier than the second video encoded data, the controller controls the first speed so as to generate a period in which the first speed becomes lower than a ×1 speed until second time information of the second decoder catches up with first time information of the first decoder. When the first video encoded data is received earlier than the second video encoded data, the first video is displayed at the first speed until the second time information catches up with the first time information.
申请公布号 US2015043885(A1) 申请公布日期 2015.02.12
申请号 US201414485237 申请日期 2014.09.12
申请人 Kabushiki Kaisha Toshiba 发明人 YAMAKAGE Tomoo
分类号 H04N21/43;H04N21/643;G11B27/10;H04N21/438;G11B20/00;G11B27/00 主分类号 H04N21/43
代理机构 代理人
主权项 1. An information processor comprising: a first decoder which receives first video encoded data via a first channel and decodes the first video encoded data at a first speed to generate a first video; a second decoder which receives second video encoded data via a second channel different from the first channel and decodes the second video encoded data at a second speed to generate a second video; and a controller which, when the first video encoded data is received earlier than the second video encoded data, controls the first speed so as to generate a period in which the first speed becomes lower than a ×1 speed until second time information of the second decoder catches up with first time information of the first decoder, wherein when the first video encoded data is received earlier than the second video encoded data, the first video is displayed at the first speed until the second time information catches up with the first time information.
地址 Minato-ku JP
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