发明名称 ゲート駆動回路
摘要 A gate driving circuit includes N stages (where N is a natural number greater than or equal to 2). The N stages are cascaded, and each of the N stages has a gate line connected thereto. A first stage group includes k stages of the N stages (where k is a natural number less than N), and the first stage group outputs a first output signal in response to a start signal. A second stage group (including N−k stages) generates a second output signal in response to the first output signal and outputs the second output signal to a corresponding gate line. The first stage group includes a first buffer and a second buffer, each of which receives the start signal. A size of the first buffer is smaller than a size of the second buffer.
申请公布号 JP5666864(B2) 申请公布日期 2015.02.12
申请号 JP20100212101 申请日期 2010.09.22
申请人 三星ディスプレイ株式會社Samsung Display Co.,Ltd. 发明人 金 ▲ヒョク▼ 珍;朴 徑 浩;盧 相 龍;趙 榮 濟;崔 國 ▲ヒュン▼;金 容 照;金 性 ▲ホン▼;金 孝 燮
分类号 G09G3/36;G02F1/133;G09G3/20 主分类号 G09G3/36
代理机构 代理人
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