INSTRUCTION AND LOGIC TO PROVIDE A SECURE CIPHER HASH ROUND FUNCTIONALITY

摘要

Instructions and logic provide secure cipher hashing algorithm round functionality. Some embodiments include a processor comprising: a decode stage to decode an instruction for a secure cipher hashing algorithm, the first instruction specifying a source data, and one or more key operands. Processor execution units, are responsive to the decoded instruction, to perform one or more secure cipher hashing algorithm round iterations upon the source data, using the one or more key operands, and store a result of the instruction in a destination register. One embodiment of the instruction specifies a secure cipher hashing algorithm round iteration using a Feistel cipher algorithm such as DES or TDES. In one embodiment a result of the instruction may be used in generating a resource assignment from a request for load balancing requests across the set of processing resources.

主权项

1. A processor comprising:
a decode stage to decode a first instruction for a secure cipher hashing algorithm, the first instruction specifying a source data, and one or more key operands; and one or more execution units, responsive to the decoded first instruction, to:
perform an initial permutation upon the source data;perform one or more round iterations of the secure cipher hashing algorithm upon the permuted source data, using the one or more key operands, wherein the one or more round iterations is less than 16; andperform an inverse initial permutation upon the enciphered data;store a result of the first instruction in a destination register.