| 发明名称 |
DATA SAMPLER CIRCUIT |
| 摘要 |
A circuit includes: a first circuit stage configured to sample a differential input signal at a first logic state of a sampling clock and regenerate the sampled differential input signal at a second logic state of the sampling clock to output a first regenerated differential signal; a second circuit stage configured to amplify the first regenerated differential signal at the second logic state of the sampling clock to output an amplified differential signal; and a third circuit stage configured to regenerate the amplified differential signal at the first logic state of the sampling clock to output a second regenerated differential signal. |
| 申请公布号 |
US2015043681(A1) |
申请公布日期 |
2015.02.12 |
| 申请号 |
US201313960213 |
申请日期 |
2013.08.06 |
| 申请人 |
STMicroelectronics International N.V. |
发明人 |
Mandal Sajal Kumar |
| 分类号 |
H04L1/00;G11C27/02 |
主分类号 |
H04L1/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A circuit, comprising:
a first circuit stage configured to sample a differential input signal at a first logic state of a sampling clock and regenerate the sampled differential input signal at a second logic state of the sampling clock to output a first regenerated differential signal; a second circuit stage configured to amplify the first regenerated differential signal at the second logic state of the sampling clock to output an amplified differential signal; and a third circuit stage configured to regenerate the amplified differential signal at the first logic state of the sampling clock to output a second regenerated differential signal. |
| 地址 |
Amsterdam NL |
