发明名称 メモリアクセス制御装置、プロセッサ及びメモリアクセス制御方法
摘要 <p><P>PROBLEM TO BE SOLVED: To improve utilization efficiency of a memory band in a memory access control device. <P>SOLUTION: An instruction issuance unit 311 issues memory access instructions to access element data stored in a RAM 11. A monitoring unit 231 monitors a congestion level of access to the RAM 11. A storage unit 324 stores the memory access instructions detected according to the congestion level monitored by the monitoring unit 231. A generation unit 325 generates an access request by compressing a plurality of memory access instructions satisfying predetermined conditions among memory access instructions stored in the storage unit 324. A reply data processing unit 331 decomposes reply data to the access request generated by the generation unit 325 into pieces of reply data to the respective memory access instructions before the compression. <P>COPYRIGHT: (C)2013,JPO&INPIT</p>
申请公布号 JP5668554(B2) 申请公布日期 2015.02.12
申请号 JP20110060874 申请日期 2011.03.18
申请人 发明人
分类号 G06F12/04;G06F12/00;G06F12/02;G06F12/06 主分类号 G06F12/04
代理机构 代理人
主权项
地址
您可能感兴趣的专利