发明名称 |
LEVEL SHIFTER |
摘要 |
A level shifter includes high breakdown voltage first and second PMOS transistors, high breakdown voltage first and second depression NMOS transistors having gates respectively supplied with first and second control signals, low breakdown voltage first and second NMOS transistors having gates respectively supplied with third and fourth control signals, and a timing control unit that generates the first control signal and the third control signal different from the first control signal corresponding to an inverted signal of an input signal, and generates the second control signal and the fourth control signal different from the second control signal corresponding to a non-inverted signal of the input signal. |
申请公布号 |
US2015042396(A1) |
申请公布日期 |
2015.02.12 |
申请号 |
US201414331009 |
申请日期 |
2014.07.14 |
申请人 |
Renesas Electronics Corporation |
发明人 |
Koudate Kazuhiro |
分类号 |
H03K19/00;H03K19/0175 |
主分类号 |
H03K19/00 |
代理机构 |
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代理人 |
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主权项 |
1. A level shifter comprising:
high breakdown voltage first and second PMOS transistors placed in parallel between a first power supply voltage terminal and a reference voltage terminal, each transistor having a gate connected to a drain of the other transistor; high breakdown voltage first and second depression NMOS transistors placed between the first and second PMOS transistors and the reference voltage terminal and having gates respectively supplied with first and second control signals; low breakdown voltage first and second NMOS transistors placed between the first and second depression NMOS transistors and the reference voltage terminal and having gates respectively supplied with third and fourth control signals; and a timing control unit placed between a second power supply voltage terminal supplied with a second power supply voltage lower than a first power supply voltage supplied to the first power supply voltage terminal and the reference voltage terminal, that generates the first control signal and the third control signal different from the first control signal corresponding to an inverted signal of an input signal, and generates the second control signal and the fourth control signal different from the second control signal corresponding to a non-inverted signal of the input signal. |
地址 |
Kawasaki-shi JP |