发明名称 COMPENSATING FOR WARPAGE OF A FLIP CHIP PACKAGE BY VARYING HEIGHTS OF A REDISTRIBUTION LAYER ON AN INTEGRATED CIRCUIT CHIP
摘要 Structures and methods of making a flip chip package that employ polyimide pads of varying heights at a radial distance from a center of an integrated circuit (IC) chip for a flip chip package. The polyimide pads may be formed under electrical connectors, which connect the IC chip to a chip carrier of the flip chip package, so that electrical connectors formed on polyimide pads of greater height are disposed at a greater radial distance from the center of the IC chip, while electrical connectors formed on polyimide pads of a lesser height are disposed more proximately to the center of the IC chip. Electrical connectors of a greater relative height to the IC chip's surface may compensate for a gap, produced by heat-induced warpage during the making of the flip chip package, that separates the electrical connectors on the IC chip from flip chip attaches on the chip carrier.
申请公布号 US2015044864(A1) 申请公布日期 2015.02.12
申请号 US201414525682 申请日期 2014.10.28
申请人 International Business Machines Corporation 发明人 Daubenspeck Timothy H.;Gambino Jeffrey P.;Muzzy Christopher D.;Sauter Wolfgang;Sullivan Timothy D.
分类号 H01L23/00 主分类号 H01L23/00
代理机构 代理人
主权项 1. A method of making a flip chip package, comprising: forming a plurality of first polyimide (PI) pads, each having a first pad height on an edge region of a passivation layer of an integrated circuit (IC) chip; forming a plurality of second PI pads, each having a second pad height, a second PI pad from a first portion of said plurality of second PI pads being stacked on each first PI pad in said edge region to form a stacked pad, and a second PI pad from a second portion of said plurality of second PI pads being formed on a mid-radial region of said passivation layer; forming a redistribution layer (RDL) that includes a plurality of conductive traces, each conductive trace extending from a lower surface contact proximate to an inner wiring level through an opening in said passivation layer to an upper surface contact disposed on one of: a top surface of each stacked pad in said edge region, a top surface of each second PI pad in said mid-radial region, a top surface area of said passivation layer in a central region, a height of each upper surface contact above said passivation layer increasing radially from said central region to said mid-radial region and further increasing radially from said mid-radial region to said edge region; forming a plurality of electrical connectors, each electrical connector being of a same height and being disposed over each upper surface contact of each conductive trace; flipping said IC chip, to which said RDL and said electrical connectors are connected, to form a flipped IC chip; and heating solder joins, disposed on said electrical connectors, to join flip chip attaches, disposed on an opposing chip carrier, to said flipped IC chip and form said flip chip package.
地址 Armonk NY US