| 摘要 |
The present invention achieves a proper balance among multiple constituent bias resistors of a variable-capacitance circuit by using different resistance values for resistors located at specific positions and the other resistors, thereby reducing a response time while sufficiently blocking an alternating-current component. This variable-capacitance circuit is a variable-capacitance circuit for which variable-capacitance components (C1-C4), the capacitances of which change in accordance with a control voltage, are connected in series between terminals to which an alternating-current signal is applied, and multiple bias application paths for applying a bias voltage to each of the variable-capacitance components via resistance components (R1-R5) are formed, wherein, among resistance components (R1-R5), resistance components (R1, R5) connected to the terminals, to which the alternating current is applied, have different resistance values from the resistance values of the other resistance components (R2-R4). |
