| 摘要 |
<p>The present invention relates to a semiconductor system including a semiconductor device to generate a bank address in refresh operation. The semiconductor device comprises: a counter to count a first internal address by synchronizing with a refresh clock generated in the refresh operation; an address transmission unit to transmit a first external signal to a second internal address in response to a refresh pulse generated in the refresh operation; and a bank address generation unit to generate a bank address to access a bank in which refresh is performed by selectively decoding the first internal address or the second internal address in response to a selection signal generated in response to a second external signal.</p> |
