Differential sense amplifier without dedicated pass-gate transistors

摘要

A differential sense amplifier for sensing data stored in a plurality of memory cells of a memory cell array, including a first CMOS inverter having an output connected to a first bit line and an input connected to a second bit line complementary to the first bit line, and a second CMOS inverter having an output connected to the second bit line and an input connected to the first bit line. Each CMOS inverter includes a pull-up transistor and a pull-down transistor, and the sense amplifier has a pair of pass-gate transistors arranged to connect the first and second bit lines to a first and a second global bit lines. Advantageously, the pass-gate transistors are constituted by the pull-up transistors or the pull-down transistors.

主权项

1. A voltage differential sense amplifier for sensing data stored in a plurality of memory cells of a memory cell array, comprising:
a first CMOS inverter having an output connected to a first bit line and an input connected to a second bit line complementary to the first bit line, and a second CMOS inverter having an output connected to the second bit line and an input connected to the first bit line, with each CMOS inverter comprising:
a pull-up transistor having a drain and a source, anda pull-down transistor having a drain and a source, with the pull-up transistor and the pull-down transistor of each CMOS inverter having a common drain, and a pair of pass-gate transistors arranged to connect the first and second bit lines to first and second global bit lines respectively to transfer data between the first and the second bit lines and the first and the second global bit lines, with the pass-gate transistors constituted by one of the pull-up transistors or the pull-down transistors.