Integrated circuit package with spatially varied solder resist opening dimension

摘要

An integrated circuit (IC) package stack with a first and second substrate interconnected by solder further includes solder resist openings (SRO) of mixed lateral dimension are spatially varied across an area of the substrates. In embodiments, SRO dimension is varied between at least two different diameters as a function of an estimated gap between the substrates that is dependent on location within the substrate area. In embodiments where deflection in at least one substrate reduces conformality between the substrates, a varying solder joint height is provided from a fixed volume of solder by reducing the lateral dimensioning of the SRO in regions of larger gap relative to SRO dimensions in regions of smaller gap. In embodiments, the first substrate may be any of an IC chip, package substrate, or interposer while the second substrate may be any of another IC chip, package substrate, interposer, or printed circuit board (PCB).

主权项

1. An integrated circuit (IC) package stack, comprising:
a first substrate; a second substrate having a plurality of solder resist openings (SRO); and a plurality of solder joints interconnecting the first and second substrates, wherein the plurality of solder joints include:
a first joint of a first height contacting a metal surface disposed on the second substrate within a first SRO of a first diameter; anda second joint of a second height, greater than the first, contacting a metal surface disposed on the second substrate within a second SRO of a second diameter, smaller than the first diameter.