| 发明名称 | Transistor and method for forming the same | ||
| 摘要 | The present invention relates to a stress-enhanced transistor and a method for forming the same. The method for forming the transistor according to the present invention comprises the steps of forming a mask layer on a semiconductor substrate on which a gate has been formed, so that the mask layer covers the gate and the semiconductor substrate; patterning the mask layer so as to expose at least a portion of each of a source region and a drain region; amorphorizing the exposed portions of the source region and the drain region; removing the mask layer; and annealing the semiconductor substrate so that a dislocation is formed in the exposed portion of each of the source region and the drain region. | ||
| 申请公布号 | US8952429(B2) | 申请公布日期 | 2015.02.10 |
| 申请号 | US201113107860 | 申请日期 | 2011.05.13 |
| 申请人 | Institute of Microelectronics, Chinese Academy of Sciences | 发明人 | Yin Haizhou;Luo Zhijong;Zhu Huilong |
| 分类号 | H01L29/772;H01L21/265;H01L29/78;H01L29/417 | 主分类号 | H01L29/772 |
| 代理机构 | Martine Penilla Group, LLP | 代理人 | Martine Penilla Group, LLP |
| 主权项 | 1. A method for forming a transistor, comprising the steps of:forming a mask layer on a semiconductor substrate on which a gate has been formed, so that the mask layer directly contacts both the gate and the semiconductor substrate; patterning the mask layer so as to expose at least two portions of each of a source region and a drain region, wherein the patterned mask layer is only formed between adjacent exposed portions in the source region and between adjacent exposed portions in the drain region; amorphorizing the exposed portions of the source region and the drain region; removing the patterned mask layer; and annealing the semiconductor substrate so that a respective dislocation is formed in the respective exposed portion of each of the source region and the drain region. | ||
| 地址 | Beijing CN | ||