发明名称 Circuit for displaying failure information of power supply unit
摘要 A circuit for displaying failure information of a power supply unit supplying power to a central processing unit includes a controller including a random access memory (RAM) to store failure information of the power supply unit, a DC power circuit, a processing unit connected to the controller for reading the fault reasons stored in the RAM, and a display unit to display the fault reasons. When the power supply unit does not operate, the DC power circuit supplies power to the controller, such that fault reasons stored in the RAM will not be lost.
申请公布号 US8954799(B2) 申请公布日期 2015.02.10
申请号 US201213531725 申请日期 2012.06.25
申请人 ScienBiziP Consulting(Shenzhen)Co., Ltd. 发明人 Feng Lan-Yi;Fu Ying-Bin
分类号 G06F11/00;G06F1/28 主分类号 G06F11/00
代理机构 Novak Druce Connolly Bove + Quigg LLP 代理人 Novak Druce Connolly Bove + Quigg LLP
主权项 1. A circuit for displaying failure information of a power supply unit, the power supply unit supplying power to a central processing unit, the circuit comprising: a controller comprising a random access memory (RAM), wherein the RAM stores failure information of the power supply unit in response to the controller being powered; a direct current (DC) power circuit, wherein the DC power circuit supplies power to the controller in response to the power supply unit being inoperative; a processing unit connected to the controller for reading the failure information stored in the RAM; and a display unit connected to the processing unit to display the failure information; wherein the processing unit comprises a chip, a filtering circuit, and an oscillating circuit, the filtering circuit comprises twelfth and thirteenth capacitors, and an eighth resistor, the oscillating circuit comprises fourteenth and fifteenth capacitors, and a crystal oscillator, a third DC power is grounded through the twelfth capacitor, and is grounded through the eighth resistor and the thirteenth capacitor connected in series, a node between the eighth resistor and the thirteenth capacitor is connected to a voltage pin of the chip, two terminals of the crystal oscillator are respectively connected to clock pins of the chip, the two terminals of the crystal oscillator are grounded respectively through the fourteenth and fifteenth capacitors, first to eighth outputs of the chip are connected to the display unit, first to third inputs of the chip are respectively connected to a data pin, a clock pin, and a detect pin of the controller, a voltage pin of the chip is connected to the third DC power, a fourth input of the chip is grounded through a switch, and ground pins of the chip are grounded.
地址 Guangdong CN