Latency reduction in a display device

摘要

A display device may reduce the latency of the display of a digital signal by reducing the latency that the display device adds to the digital signal. After a digital signal is received by an input module, the signal is stored in a frame buffer as a plurality of pixels. A controller determines the input frame rate of the digital signal and a pixel delay. The controller monitors the frame buffer to determine when the frame buffer has stored a number of pixels greater than or equal to the pixel delay. After the frame buffer contains enough pixels, the controller initiates transmission of the pixels from the frame buffer to a display module. In certain embodiments, the controller initiates transmission of the pixels to the display module before the frame buffer has stored all pixels corresponding to the frame.

主权项

1. A display device for reducing latency comprising:
an input module operable to receive a digital signal having an associated frame rate, the digital signal comprising a frame including a total number of pixels; a frame buffer operable to store one or more of the pixels; a display module operable to receive the pixels and to display the frame; and a controller operable to:
determine the frame rate of the digital signal;determine a pixel delay from the frame rate, the pixel delay including a threshold number of pixels;determine a stored number of pixels in the frame buffer; andin response to determining the stored number of pixels is greater than or equal to the threshold number of pixels but less than the total number of pixels, instruct the frame buffer to initiate transmission of the pixels to the display module.