发明名称 Method and system for performing fast electrical analysis and simulation of an electronic design for power gates
摘要 A system, method, and computer program product is disclosed for performing electrical analysis of a circuit design. A voltage-based approach is described for performing two-stage transient EM-IR drop analysis of an electronic design. A two-stage approach is performed in some embodiments, in which the first stage operates by calculating the voltage at certain interface nodes. In the second stage, simulation is performed to simulate the circuit to concurrently obtain the current at the interface nodes. In some embodiments, multiple adjacent devices as identified as interface devices for purposes of the analysis. One situation where it may be useful to analyze a larger portion of the circuitry in this way where the analysis is being performed on a netlist having a power gate.
申请公布号 US8954917(B1) 申请公布日期 2015.02.10
申请号 US201314050269 申请日期 2013.10.09
申请人 Cadence Design Systems, Inc. 发明人 Shu John Yanjiang;Tian Wei Michael;Deng An-Chang
分类号 G06F17/50 主分类号 G06F17/50
代理机构 Vista IP Law Group, LLP 代理人 Vista IP Law Group, LLP
主权项 1. A method implemented with a processor for analyzing a circuit design, comprising: one or more computing systems receiving an electronic design for analysis from a non-transitory storage medium or a network path; the one or more computing systems executing a first sequence of instructions of a program code stored on the non-transitory computer readable medium using one or more processors to calculate voltage values for tap nodes for a net in the electronic design in a first stage analysis, rather than using a constant power supply voltage for the net of the electronic design; and the one or more computing systems executing a first sequence of instructions of the program code using the one or more processors for performing a simulation on a new netlist that includes the tap nodes and one or more tap devices at a first level in a second stage, wherein the new netlist comprises at least the first level and a second level that forms a first net in the net,the tap nodes or the one or more tap devices are identified to be included in the new netlist based at least on their close proximity to the net, andthe voltage values calculated in the first stage are used to perform the simulation in the second stage.
地址 San Jose CA US