发明名称 Method of adding features to parameterized cells
摘要 An electronic design automation (EDA) tool for adding a feature to a target parameterized cell (pcell) in an electronic circuit design includes a memory that stores the electronic circuit design, and a processor in communication with the memory. The processor defines a specification of an add-on pcell. The specification includes a feature to be added to the target pcell. The processor reads the properties associated with the target pcell and generates the add-on pcell based on its specification and the properties of the target pcell. The add-on pcell then is instantiated and bound to the target pcell, which adds the feature to the target pcell.
申请公布号 US8954903(B1) 申请公布日期 2015.02.10
申请号 US201314064225 申请日期 2013.10.28
申请人 Freescale Semiconductor, Inc. 发明人 Yadav Amar Kumar;Bala Indu;Iqbal Zameer;Prasad Dwarka
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人 Bergere Charles
主权项 1. An electronic design automation (EDA) tool for adding a feature to a target parameterized cell (pcell) of a plurality of pcells of an electronic circuit design, the EDA tool comprising: a memory that stores the electronic circuit design; and a processor in communication with the memory, wherein the processor includes: means for defining a specification of an add-on pcell, wherein the specification includes the feature to be added to the target pcell;means for reading at least one property associated with the target pcell;means for generating the add-on pcell based on the specification and the at least one property of the target pcell;means for instantiating the add-on pcell; andmeans for binding the add-on pcell to the target pcell, whereby the feature is added to the target pcell by way of the add-on pcell.
地址 Austin TX US