Programmable test engine (PCDTE) for emerging memory technologies

摘要

A programmable characterization-debug-test engine (PCDTE) on an integrated circuit chip. The PCDTE includes an instruction memory that receives and stores instructions provided on a chip interface, and a configuration memory that receives and stores configuration values provided on the chip interface. The PCDTE also includes a controller that configures a plurality of address counters and data registers in response to the configuration values. The controller also executes the instructions, wherein read/write addresses and write data are retrieved from the counters in response to the instructions. The retrieved read/write addresses and write data are used to access a memory under test. Multiple ports of the memory under test may be simultaneously accessed. Multiple instructions may be linked. The instructions may specify special counting functions within the counters and/or specify integrated (linked) counters. The PCDTE may transmit information off of the chip to exercise transmit/receive circuitry of the chip.

主权项

1. An integrated circuit chip comprising:
an interface that receives signals external to the integrated circuit chip; a programmable test engine coupled to the interface that includes:
a programmable instruction memory that stores one or more instructions received by the interface;a programmable configuration memory that stores a plurality of configuration values;a plurality of counters, each configured by a corresponding one of the configuration values; anda controller that accesses the one or more instructions from the programmable instruction memory, and in response, generates memory access transactions; and a transmitter that transmits the memory access transactions off of the integrated circuit chip, wherein the transmitter includes a serializer that serializes the memory access transactions into serial data.