发明名称 DATA OUTPUT CIRCUIT
摘要 <p>The present invention provides a data output circuit capable of stably outputting data. The data output circuit comprises: a latch control signal generation unit to generate a latch control signal including a pulse in which an input pulse signal and pulse width are controlled as much as the predetermined intervals in response to a read command; and a data output unit to generate latch data by latching data loaded on an input and output line during pulse width of the latch control signal in response to the input pulse signal and to output data by buffering the latch data according to an output control signal generated from the read command.</p>
申请公布号 KR20150014611(A) 申请公布日期 2015.02.09
申请号 KR20130089980 申请日期 2013.07.30
申请人 发明人
分类号 G11C7/10 主分类号 G11C7/10
代理机构 代理人
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