发明名称 |
INFORMATION PROCESSOR, INFORMATION PROCESSING METHOD AND COMPUTER-READABLE STORAGE MEDIUM FOR DESIGNING AN ELECTRONIC SYSTEM |
摘要 |
Disclosed is an information processor that designs an target system in which a plurality of components are spatially arranged, the components whose kinds are different for each layer are electrically connected hierarchically, and electrical output of each component is inputted to a component in a next higher layer from the component. The information processor comprises an electrical connection relation generating unit which generates an electrical connection relation of the plurality of components by adjusting the electrical connection relation of the components determined by the number of connections which each component can make with other components and a kind of the components of each hierarchy, based on the number of the components of a predetermined kind that can be arranged in a given space and an electrically permissible amount of the component in a top layer of the hierarchy. The information processor comprises a spatial arrangement determining unit which determines a spatial arrangement of the components of the predetermined kind, based on the electrical connection relation generated by the electrical connection relation generating unit and rules of the spatial arrangement of the components. |
申请公布号 |
WO2015016394(A1) |
申请公布日期 |
2015.02.05 |
申请号 |
WO2014JP71131 |
申请日期 |
2014.08.04 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
ISHII, GAKU;MARUCHI, KOHEI;IWAMASA, MIKITO |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|