发明名称 ARITHMETIC LOGIC UNIT
摘要 PROBLEM TO BE SOLVED: To provide an arithmetic logic unit capable of performing arithmetic processing with a relatively small-scale circuit configuration in a relatively short period of time.SOLUTION: An arithmetic logic unit includes a memory device 12 which receives an input of a bit string of N (N is an integer of N≥2) bit length and stores a lookup table that is configured so as to store the data of a multiple-bit length, part of which includes a bit indicating a logical operation result between bits which are included in the input bit string, at an address indicated by the input bit string. The arithmetic logic unit accesses the memory device 12 and outputs bits which are included in the data stored in the address indicated by the received bit string.
申请公布号 JP2015026341(A) 申请公布日期 2015.02.05
申请号 JP20130157090 申请日期 2013.07.29
申请人 INCORPORATED EDUCATIONAL INSTITUTION MEISEI;BUFFALO MEMORY CO LTD 发明人 OTSUKA KANJI;SATO YOICHI;OKINAGA TAKAYUKI;AZUMA SHUICHIRO
分类号 G06F7/575;G06F1/02 主分类号 G06F7/575
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