发明名称 SYSTEM CONSTRAINTS-AWARE SCHEDULER FOR HETEROGENEOUS COMPUTING ARCHITECTURE
摘要 Processors, systems, and methods are arranged to schedule tasks on heterogeneous processor cores. For example, a scheduler is arranged to perform a heuristics based function for allocating operating system tasks to the processor cores. The system includes a hint generator providing a system constraints-aware function that biases the scheduler to select a processor core depending on the change in one or more performance constraint parameters.
申请公布号 US2015040136(A1) 申请公布日期 2015.02.05
申请号 US201314106022 申请日期 2013.12.13
申请人 Texas Instruments, Incorporated 发明人 Matthes Katrin;Ramonda Damien
分类号 G06F9/50 主分类号 G06F9/50
代理机构 代理人
主权项 1. A processor, comprising: a plurality of processor cores, each of which is arranged to perform processing tasks, and wherein at least one of the processor cores is of a different architecture than the other core(s); a scheduler that is arranged to receive task identifiers of respective processing tasks from a task queue and to allocate a selected core of the processor cores for each respective processing task received from the task queue; and a hint generator that is arranged to monitor one or more performance constraint parameters of the processor during operation of the processor and to generate a hint in response to the monitored one or more performance parameters, wherein the scheduler is arranged to allocate the respective processing task from the task queue to the selected core in response to the generated hint.
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