TEST MUX FLIP-FLOP CELL FOR REDUCED SCAN SHIFT AND FUNCTIONAL SWITCHING POWER CONSUMPTION

摘要

A new flip-flop cell that is more efficient in scan chain configuration includes a multiplexer, storage element (e.g., a flip-flop), an inverter, and multiple logic gates. The flip-flop cell is configured to receive both a test signal and a data input signal and select one of the two to pass to the storage element based on a scan enable signal that indicates either a capture mode or a scan shift mode. In capture mode, the data input signal is passed to the storage element, and the internal outputs of the flip-flop are supplied to the logic gates. Based on the internal outputs and scan enable signal, the logic gates disable either one of two outputs of the flip-flop cell. In capture mode, a test flip-flop cell output is disabled. In scan shift mode, a standard function flip-flop cell output is disabled.

主权项

1. A circuit, comprising:
a first multiplexer configured to receive a data input, a test input, and a scan enable signal and provide a multiplexed output; a first storage element configured to generate an internal data signal based on the multiplexed output and a clock signal; and logic circuitry configured to produce a flip-flop cell output and a test flip-flop cell output based on the internal data signal and the enable signal.