发明名称 INTEGRATED CIRCUIT WITH MATCHING THRESHOLD VOLTAGES AND METHOD FOR MAKING SAME
摘要 An integrated circuit having a substrate, a buffer layer formed over the substrate, a barrier layer formed over the buffer layer, and an isolation region that isolates an enhancement mode device from a depletion mode device. The integrated circuit further includes a first gate contact for the enhancement mode device that is disposed in one gate contact recess and a second gate contact for the depletion mode device that is disposed in a second gate contact recess.
申请公布号 WO2015017513(A2) 申请公布日期 2015.02.05
申请号 WO2014US48828 申请日期 2014.07.30
申请人 EFFICIENT POWER CONVERSION CORPORATION 发明人 CAO, JIANJUN;BEACH, ROBERT;LIDOW, ALEXANDER;NAKATA, ALANA;STRITTMATTER, ROBERT;ZHAO, GUANGYUAN;MA, YANPING;ZHOU, CHUNHUA;KOLLURI, SESHADRI;LIU, FANG CHANG;CHIANG, MING-KUN;CAO, JIALI;JAUHAR, AGUS
分类号 H01L27/088;H01L21/8236;H01L29/20;H01L29/66;H01L29/778 主分类号 H01L27/088
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