发明名称 |
CONTROL CIRCUIT AND DC-DC CONVERTER |
摘要 |
To provide a control circuit in a DC-DC converter, which includes transistors with the same conductivity type. The control circuit generates a pulse signal (GS), and includes a hysteresis comparator, a logic unit, a digital-analog converter circuit, and a comparator. The hysteresis comparator converts a signal (FB) based on an output voltage of the DC-DC converter into a digital signal (comp). The logic unit generates, in accordance with the signal comp, a pulse width modulation signal (pwm) determining a pulse width of the signal GS. The logic unit also divides a reference clock signal to generate an m-bit (m is greater than or equal to 2) second digital signal. The digital-analog converter circuit converts the m-bit second digital signal into an analog signal to generate a 2m-level triangular wave signal. The comparator compares the signal pwm with the triangular wave signal to output the comparison result as the signal GS. |
申请公布号 |
US2015035509(A1) |
申请公布日期 |
2015.02.05 |
申请号 |
US201414330016 |
申请日期 |
2014.07.14 |
申请人 |
SEMICONDUCTOR ENERGY LABORATORY CO., LTD. |
发明人 |
KOYAMA Jun;TAKAHASHI Kei;OHMARU Takuro |
分类号 |
H02M3/157 |
主分类号 |
H02M3/157 |
代理机构 |
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代理人 |
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主权项 |
1. A control circuit comprising:
an analog-digital converter circuit; a logic unit electrically connected to the analog-digital converter circuit; a digital-analog converter circuit electrically connected to the logic unit; and a comparator electrically connected to the digital-analog converter circuit, wherein the analog-digital converter circuit is configured to generate a first digital signal based on a voltage of an input signal, wherein the logic unit is configured to generate a pulse width modulation signal based on the first digital signal, wherein the pulse width modulation signal determines a pulse width of a pulse signal, wherein the logic unit is configured to divide an input reference clock signal to generate an m-bit second digital signal, wherein the digital-analog converter circuit is configured to convert the m-bit second digital signal into an analog signal to generate a 2m-level triangular wave signal, wherein m is greater than or equal to 2, and wherein the comparator is configured to compare the pulse width modulation signal with the 2m-level triangular wave signal to output a comparison result as the pulse signal. |
地址 |
Atsugi-shi JP |