发明名称 NON-VOLATILE MEMORY DEVICE
摘要 According to one embodiment, a non-volatile memory device includes a first stacked electrode provided above a underlying layer, a second stacked electrode juxtaposed with the first stacked electrode above the underlying layer, a plurality of first semiconductor layers piercing the first stacked electrode in a direction perpendicular to the underlying layer, and a second semiconductor layer piercing the second stacked electrode in a direction perpendicular to the underlying layer. The device further includes a memory film provided between the first stacked electrode and the first semiconductor layers, and between the second stacked electrode and the second semiconductor layer, and a link part provided between the underlying layer and the first stacked electrode, and between the underlying layer and the second stacked electrode. The link part is electrically connected to one end of each of the first semiconductor layers and one end of the second semiconductor layer.
申请公布号 US2015035041(A1) 申请公布日期 2015.02.05
申请号 US201414202470 申请日期 2014.03.10
申请人 Kabushiki Kaisha Toshiba 发明人 SHINOHARA Hiroshi
分类号 H01L29/792 主分类号 H01L29/792
代理机构 代理人
主权项 1. A non-volatile memory device comprising: a first stacked electrode provided above an underlying layer; a second stacked electrode juxtaposed with the first stacked electrode above the underlying layer; a plurality of first semiconductor layers piercing the first stacked electrode in a direction perpendicular to the underlying layer; a second semiconductor layer piercing the second stacked electrode in a direction perpendicular to the underlying layer; a memory film provided between the first stacked electrode and each of the first semiconductor layers; a link part provided between the underlying layer and the first stacked electrode, and between the underlying layer and the second stacked electrode, the link part being electrically connected to one end of each of the first semiconductor layers and one end of the second semiconductor layer; a first interconnection electrically connected to another end of each of the first semiconductor layers in common; a second interconnection electrically connected to another end of the second semiconductor layer; and a first control electrode provided between the first stacked electrode and the first interconnection, the first control electrode facing the first semiconductor layers via an insulating film to control ON and OFF states of electric conduction of the first semiconductor layers.
地址 Minato-ku JP