发明名称 PROCESS FOR IMPROVING CRITICAL DIMENSION UNIFORMITY OF INTEGRATED CIRCUIT ARRAYS
摘要 Methods for patterning integrated circuit (IC) device arrays employing an additional mask process for improving center-to-edge CD uniformity are disclosed. In one embodiment, a repeating pattern of features is formed in a masking layer over a first region of a substrate. Then, a blocking mask is applied over the features in the masking layer. The blocking mask is configured to differentiate array regions of the first region from peripheral regions of the first region. Subsequently, the pattern of features in the array regions is transferred into the substrate. In the embodiment, an etchant can be uniformly introduced to the masking layer because there is no distinction of center/edge in the masking layer. Thus, CD uniformity can be achieved in arrays which are later defined.
申请公布号 US2015035124(A1) 申请公布日期 2015.02.05
申请号 US201414517685 申请日期 2014.10.17
申请人 MICRON TECHNOLOGY, INC. 发明人 Kewley David
分类号 H01L27/02;H01L21/033 主分类号 H01L27/02
代理机构 代理人
主权项 1. An intermediate integrated circuit structure, comprising: a substrate comprising a plurality of array regions and peripheral regions surrounding and between the array regions; and a repeating pattern of features formed over the substrate and spanning across two or more array regions and one or more peripheral regions.
地址 Boise ID US
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