| 摘要 |
A shift register circuit is provided that can suppress a decrease in a drive capability when a frequency of a clock signal increases. A unit shift register includes a first transistor for supplying a clock signal to an output terminal, a pull-up driving circuit for driving the first transistor, a second transistor for discharging the output terminal, and a pull-down driving circuit for driving the second transistor. In the pull-up driving circuit, the gate of a third transistor charging the gate of the first transistor is charged in accordance with activation of an output signal of preceding stage, and the potential at the gate of the third transistor is increased with a capacitive element. As a result, the third transistor operates in the non-saturated region. |
