发明名称 |
INTEGRATION OF NON-VOLATILE CHARGE TRAP MEMORY DEVICES AND LOGIC CMOS DEVICES |
摘要 |
An embodiment of a method of integrating a non-volatile memory device into a logic MOS flow is described. Generally, the method includes: forming in a first region of a substrate a channel of a memory device from a semiconducting material overlying a surface of the substrate, the channel connecting a source and a drain of the memory device; forming a charge trapping dielectric stack over the channel adjacent to a plurality of surfaces of the channel, wherein the charge trapping dielectric stack includes a blocking layer on a charge trapping layer over a tunneling layer; and forming a MOS device over a second region of the substrate. |
申请公布号 |
EP2831919(A1) |
申请公布日期 |
2015.02.04 |
申请号 |
EP20130769241 |
申请日期 |
2013.03.18 |
申请人 |
CYPRESS SEMICONDUCTOR CORPORATION |
发明人 |
RAMKUMAR, KRISHNASWAMY;JENNE, FREDRICK;LEVY, SAGY |
分类号 |
H01L29/792;B82Y10/00;H01L21/28;H01L27/115;H01L29/06;H01L29/66;H01L29/78 |
主分类号 |
H01L29/792 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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