Sharing local control lines across multiple planes in a memory device

摘要

Memory devices, methods for accessing a memory cell, and memory systems are disclosed. One such memory device includes a plurality of planes of memory cells. Each plane of memory cells includes series strings of memory cells that each have a select gate drain transistor. Control gates of corresponding select gates are coupled together by a shared local control line. Each of a plurality of global control lines are coupled to their corresponding local control line with only a single global select gate.

主权项

1. A memory device comprising:
a plurality of planes of memory cells, each plane having at least one series string of memory cells, each series string of memory cells having a local select gate wherein a control gate of each corresponding local select gate of the plurality of planes of memory cells is coupled to a local shared control line and only one global select gate is configured to control access for the local shared control line to a global control line.