| 发明名称 | Shared integrated sleep mode regulator for SRAM memory | ||
| 摘要 | Embodiments are described for a method for regulating sleep mode of a plurality of sub-banks in an SRAM array by isolating all of the sub-banks from a regulator upon access to at least one sub-bank that causes the accessed sub-bank to go to an operating voltage, and isolating the accessed sub-bank from non accessed sub-banks, while maintaining a sleep voltage on a load memory array and each of the sub-banks through the regulator; comparing a voltage on the non accessed sub-banks to a voltage output of the regulator; and providing a sleep voltage level to all of the sub-banks through the regulator when the voltage on the non accessed sub-banks is less than the sleep voltage. | ||
| 申请公布号 | US8947967(B2) | 申请公布日期 | 2015.02.03 |
| 申请号 | US201213725385 | 申请日期 | 2012.12.21 |
| 申请人 | Advanced Micro Devices Inc. | 发明人 | Dreesen Michael;Greenwood Stephen;Doyle Bruce |
| 分类号 | G11C5/14;G11C7/00 | 主分类号 | G11C5/14 |
| 代理机构 | Staniford Tomita LLP | 代理人 | Staniford Tomita LLP |
| 主权项 | 1. A method for regulating sleep mode of a plurality of sub-banks in an SRAM array, comprising: isolating, during an access to at least one sub-bank of the plurality of sub-banks that causes the accessed sub-bank to go to an operating voltage, all of the sub-banks from a regulator and isolating the accessed sub-bank from the non-accessed sub-banks while maintaining a sleep voltage on a load memory array and each of the sub-banks through the regulator; comparing a voltage on all sub-banks to a voltage output of the regulator; and providing a sleep voltage level to all of the sub-banks through the regulator when the voltage on the non-accessed sub-banks is less than the sleep voltage. | ||
| 地址 | Sunnyvale CA US | ||