发明名称 Verification of design libraries and databases
摘要 Method and system for verifying data in a database. In one aspect, verifying data includes receiving an indication of at least one policy, the at least one policy including at least one rule. A verification process is initiated on target data by implementing the at least one policy, where implementing the at least one policy includes instantiating and applying the at least one rule. The at least one rule causes at least one verification check to be performed on the target data.
申请公布号 US8949203(B1) 申请公布日期 2015.02.03
申请号 US201213348056 申请日期 2012.01.11
申请人 Cadence Design Systems, Inc. 发明人 O'Riordan Donald J.;McMahon James;Tseng Pei-Der
分类号 G06F7/00 主分类号 G06F7/00
代理机构 Sawyer Law Group, P.C. 代理人 Sawyer Law Group, P.C.
主权项 1. A method for verifying target data that includes circuit data cells and cellviews used in a circuit design, the method comprising: receiving an indication of at least one policy, the at least one policy referencing at least one rule, wherein the at least one rule is applied in accordance with a particular stage of multiple stages in a design flow for producing a finalized circuit design; and initiating a verification process on the target data using at least one processor by performing at least one verification check on the target data in accordance with the at least one rule, wherein the verification process includes an option to override at least one attribute of the at least one rule and to customize the at least one verification check.
地址 San Jose CA US