发明名称 Idle power control in multi-display systems
摘要 A system and method for reducing power consumption of a video subsystem. A computer system includes multiple display devices supported by a graphics processor. A memory for storing video data for the multiple display devices utilizes multiple channels for higher bandwidth. A systems controller within the graphics processor determines a retraining condition, such as an idle power state, is satisfied for one or more channels of the multiple memory channels. The graphics processor divides each respective screen for the multiple display devices into multiple horizontal bars. For each one of the multiple horizontal bars, the corresponding data may be rearranged from being distributed across the multiple channels to being stored in a single one of the multiple channels. The systems controller determines a given channel is an upcoming free channel. This free channel is retrained while it is free. Retraining may include at least reducing its memory clock (MCLK) frequency.
申请公布号 US8949554(B2) 申请公布日期 2015.02.03
申请号 US201113308547 申请日期 2011.12.01
申请人 Advanced Micro Devices, Inc. 发明人 Sadowski Greg;Presant Stephen
分类号 G06F13/00;G06F13/28 主分类号 G06F13/00
代理机构 Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C. 代理人 Rankin Rory D.;Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
主权项 1. A processor comprising: a memory hub configured to be coupled to a memory including a plurality of memory channels; and a system manager unit (SMU); wherein in response to determining a retraining condition is satisfied for one or more channels of the plurality of memory channels, the SMU is configured to: read data from the memory that corresponds to two or more memory channels;write the data back to the memory such that the data corresponds to a single channel of the plurality of memory channels; andstore data for a plurality of horizontal bars across a plurality of memory channels.
地址 Sunnyvale CA US