发明名称 Dynamic address grouping for parallel programming in non-volatile memory
摘要 A non-volatile memory system evaluates user data before writing in order to potentially group addresses for writing within a cycle. The system can determine which sense amplifier addresses of a column address will be programmed in a column address cycle. The number of bits that will be programmed is compared with an allowable number of parallel bits. The system generates groups of sense amplifier addresses based on the comparison. The system generates groups that include a total number of bits to be programmed that is within the allowable number of parallel bits. Each group is programmed in one sense amplifier address cycle. Multiple sense amplifier addresses can be grouped for programming while still remaining within an allowable number of parallel programming bits. The system performs a read before write operation and generates bitmap data for the grouping information corresponding sense amplifier addresses.
申请公布号 US8947972(B2) 申请公布日期 2015.02.03
申请号 US201313839300 申请日期 2013.03.15
申请人 SanDisk 3D LLC 发明人 Balakrishnan Gopinath;Liu Tz-Yi
分类号 G11C8/18;G06F12/02 主分类号 G11C8/18
代理机构 Vierra Magen Marcus LLP 代理人 Vierra Magen Marcus LLP
主权项 1. A method of programming non-volatile storage, comprising: identifying a set of address cycles for writing user data in response to a write request; generating bitmap data for the set of address cycles based on the user data to be programmed for individual address cycles of the set, the bitmap data associates two or more address cycles of the set having a number of programmable bits within an allowable threshold; and programming the user data to be written during the two or more address cycles of the set in one address cycle based on the bitmap data.
地址 Milpitas CA US