发明名称 Content addressable memory chip
摘要 A content addressable memory chip which can perform a high speed search with less error is provided. A match amplifier zone determines coincidence or non-coincidence of search data with data stored in the content addressable memory cells in an entry of a CAM cell array, according to the voltage of a match line. The match amplifier zone comprises one or more NMOS transistors and one or more PMOS transistors. The match amplifier zone has a dead zone to an input of a voltage of the match line, and has a property that no flow-through current is present in the match amplifier zone.
申请公布号 US8947901(B2) 申请公布日期 2015.02.03
申请号 US201414320850 申请日期 2014.07.01
申请人 Renesas Electronics Corporation 发明人 Kishida Masanobu
分类号 G11C15/04 主分类号 G11C15/04
代理机构 Sughrue Mion, PLLC 代理人 Sughrue Mion, PLLC
主权项 1. A content addressable memory chip, comprising: a plurality of entries each having a plurality of content addressable memory cells in a memory array; a plurality of match lines, arranged corresponding to the respective entries, each coupled to the plurality of content addressable memory cells in a corresponding one of the entries; and a plurality of match amplifiers, each coupled to an associated one of the match lines and a match amplifier enable signal line, and detecting a voltage on the associated one of the match lines, wherein each of match amplifiers comprises a NAND circuit receiving the voltage on the associated one of the match lines and a voltage on the match amplifier enable signal line, wherein the NAND circuit comprises a first NMOS transistor having a gate coupled to the associated one of the match lines, a source coupled to a ground and a drain, and having a first threshold value higher than a threshold value of a standard NMOS transistor composing the content addressable memory cells.
地址 Kanagawa JP