Lateral castout (LCO) of victim cache line in data-invalid state

摘要

A victim cache line having a data-invalid coherence state is selected for castout from a first lower level cache of a first processing unit. The first processing unit issues on an interconnect fabric a lateral castout (LCO) command identifying the victim cache line to be castout from the first lower level cache, indicating the data-invalid coherence state, and indicating that a lower level cache is an intended destination of the victim cache line. In response to a coherence response to the LCO command indicating success of the LCO command, the victim cache line is removed from the first lower level cache and held in a second lower level cache of a second processing unit in the data-invalid coherence state.

主权项

1. A method of data processing in a data processing system including a plurality of processing units including a first processing unit and a second processing unit coupled by an interconnect fabric, wherein the first processing unit has a first processor core having an associated first upper level cache and a first lower level cache, and wherein the second processing unit has a second processor core and an associated second upper level cache and second lower level cache, said method comprising:
in response to a need to evict one of a plurality of cache lines in a congruence class of the first lower level cache:
selecting a victim cache line to be evicted from the congruence class of the first lower level cache;determining, based at least on a coherence state of the victim cache line, whether to perform a lateral castout (LCO) to a lower level cache of another of the plurality of processing units or a castout to a system memory, wherein the determining includes determining to perform a LCO of a coherence state of the victim cache line in response to the victim cache line having a first data-invalid coherence state and determining to perform a castout of the coherence state of the victim cache line to the system memory in response to the victim cache line having a second data-invalid coherence state; in response to determining to perform the LCO of the coherence state of the victim cache line, the first processing unit issuing a lateral castout (LCO) command on the interconnect fabric, wherein the LCO command identifies an address of the victim cache line to be evacuated from the first lower level cache, indicates the first data-invalid coherence state, and indicates that a lower level cache is an intended destination of the coherence state of the victim cache line; and in response to a coherence response to the LCO command indicating success of the LCO command, evacuating the victim cache line from the first lower level cache and associating the address of the victim cache line with the first data-invalid coherence state in a directory of the second lower level cache, wherein the LCO command does not transfer data of the victim cache line from the first lower level cache to the second lower level cache.