| 发明名称 |
Semiconductor memory device |
| 摘要 |
According to one embodiment, a semiconductor memory device includes a memory cell array, a buffer configured to hold data input to an input/output circuit and to hold data read from the memory cell array, and a controller configured to receive a first command and an address from the outside and to read data, in response to the first command, from a memory cell group coupled to a selected word line designated by the address to the buffer. The controller receives a second command which is input after the first command and indicates a last command of a group of commands including write commands and/or read commands, and starts a write operation from the buffer to the memory cell array in response to the second command. |
| 申请公布号 |
US8947918(B2) |
申请公布日期 |
2015.02.03 |
| 申请号 |
US201314014231 |
申请日期 |
2013.08.29 |
| 申请人 |
|
发明人 |
Fujita Katsuyuki |
| 分类号 |
G11C11/16 |
主分类号 |
G11C11/16 |
| 代理机构 |
Holtz, Holtz, Goodman & Chick PC |
代理人 |
Holtz, Holtz, Goodman & Chick PC |
| 主权项 |
1. A semiconductor memory device comprising:
a memory cell array comprising memory cells; word lines coupled to rows of the memory cell array; bit lines coupled to columns of the memory cell array; an input/output circuit configured to receive data from the outside and to output data to the outside; a buffer configured to hold data input to the input/output circuit and to hold data read from the memory cell array via the bit lines; and a controller configured to receive a first command and an address from the outside and to read data, in response to the first command, from a memory cell group coupled to a selected word line designated by the address to the buffer, wherein the controller receives a second command which is input after the first command and indicates a last command of a group of commands including write commands and/or read commands, and the controller starts a write operation from the buffer to the memory cell array in response to the second command. |
| 地址 |
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