发明名称 Organic light emitting diode display, thin film transitor array panel, and method of manufacturing the same
摘要 A thin film transistor array panel includes a substrate, a semiconductor that is positioned on the substrate and that has a source area, a drain area, and a channel area, a gate insulating layer that is positioned on the semiconductor, a gate electrode that is positioned on the gate insulating layer and that overlaps the channel area, a first interlayer insulating layer that is positioned on the gate electrode and that has contact holes that expose the source area and the drain area, respectively, of which the source area and the drain area have a same plane pattern as that of the contact holes, and a source electrode and a drain electrode that are positioned on the first interlayer insulating layer and that are connected to the source area and the drain area, through the contact holes, respectively.
申请公布号 US8946008(B2) 申请公布日期 2015.02.03
申请号 US201313897745 申请日期 2013.05.20
申请人 Samsung Display Co., Ltd. 发明人 Ahn Ki-Wan
分类号 H01L29/66;H01L29/786;H01L51/52;H01L27/12 主分类号 H01L29/66
代理机构 Lee & Morse, P.C. 代理人 Lee & Morse, P.C.
主权项 1. A method of manufacturing a TFT array panel, the method comprising: stacking a polysilicon layer, an insulating layer, and a metal layer on a substrate; forming a photosensitive film pattern having a first portion and a second portion having a thickness smaller than that of the first portion on the metal layer; forming a metal pattern, a gate insulating layer, and a semiconductor by etching the metal layer, the insulating layer, and the polysilicon layer using the photosensitive film pattern as a mask; forming a gate electrode by removing the second portion of the photosensitive film pattern and by etching the metal pattern using the first portion as a mask; removing the first portion of the photosensitive film pattern; forming an interlayer insulating layer on the gate electrode; forming contact holes that expose the semiconductor in the interlayer insulating layer; forming a source area and a drain area by doping semiconductor conductive impurities through the contact holes, respectively; and forming a source electrode and a drain electrode that are connected to the source area and the drain area, respectively, on the interlayer insulating layer.
地址 Yongin, Gyeonggi-Do KR