发明名称 Memory device and memory system
摘要 A memory device and a memory system, the memory system including a data compressor for generating compressed data by compressing program data in a first unit, and an error correction block generator for dividing the compressed data in a second unit to obtain a plurality of pieces of normal data, and generating error correction blocks for correcting errors of the plurality of pieces of normal data, wherein each of the error correction blocks comprises the normal data, invalid data having a size corresponding to the size of the normal data, and parities for the normal data and the invalid data.
申请公布号 US8949687(B2) 申请公布日期 2015.02.03
申请号 US201213396791 申请日期 2012.02.15
申请人 Samsung Electronics Co., Ltd. 发明人 Seo Man-keun;Kong Jun-jin;Cho Kyoung-Lae
分类号 G11C29/00;H03M7/30;H03M13/05;G06F11/10 主分类号 G11C29/00
代理机构 Myers Bigel Sibley & Sajovec, P.A. 代理人 Myers Bigel Sibley & Sajovec, P.A.
主权项 1. An integrated circuit memory system, comprising: an error correction block generator comprising a data split circuit configured to divide a string of compressed data into a plurality of strings of normal data and an error correction encoding circuit configured to encode each of the plurality of strings of normal data into a respective error correction block, wherein each of the error correction blocks comprises combined data and an error correction code, wherein the combined data comprises normal data and invalid data, and wherein the error correction code is generated by encoding the combined data.
地址 KR