Nonvolatile semiconductor memory apparatus

摘要

According to one embodiment, a nonvolatile semiconductor memory apparatus includes a memory cell array, a row decoder, a controller. The memory cell array includes a plurality of memory strings. The memory strings include a first select transistor and a second select transistor, and are connected to each of a plurality of bit lines. The row decoder applies a voltage to the first and second select transistors. The controller detects a defect of the bit lines based on data read from the memory cells.

主权项

1. A nonvolatile semiconductor memory apparatus comprising:
a memory cell array including a block, the block including a plurality of memory strings, the memory strings being coupled to a plurality of bit lines, the plurality of bit lines including a first bit line which is coupled to n memory strings in the block, and each memory string including a plurality of memory cells stacked and a first select transistor; a row decoder capable of selecting k memory strings in the block (where k is equal to or greater than 2, and k is less than n), the k memory strings being coupled to the first bit line, and the k memory strings being disposed next to each other; and a controller configured to detect a defect based on data read from the memory cells provided in a selected memory string.