发明名称 Monolithically integrated self-aligned GaN-HEMTs and Schottky diodes and method of fabricating the same
摘要 Monolithic integration of high-frequency GaN-HEMTs and GaN-Schottky diodes. The integrated HEMTs/Schottky diodes are realized using an epitaxial structure and a fabrication process which reduces fabrication cost. Since the disclosed process preferably uses self-aligned technology, both devices show extremely high-frequency performance by minimizing device parasitic resistances and capacitances. Furthermore, since the Schottky contact of diodes is formed by making a direct contact of an anode metal to the 2DEG channel the resulting structure minimizes an intrinsic junction capacitance due to the very thin contact area size. The low resistance of high-mobility 2DEG channel and a low contact resistance realized by a n+GaN ohmic regrowth layer reduce a series resistance of diodes as well as access resistance of the HEMT.
申请公布号 US8946724(B1) 申请公布日期 2015.02.03
申请号 US201313907704 申请日期 2013.05.31
申请人 HRL Laboratories, LLC 发明人 Shinohara Keisuke;Regan Dean C.
分类号 H01L29/15;H01L27/06;H01L29/872 主分类号 H01L29/15
代理机构 Ladas & Parry 代理人 Ladas & Parry
主权项 1. A HEMT and Schottky diode integrated circuit device comprising: a. a common substrate for said HEMT and Schottky diode; b. a 2DEG channel layer disposed over said common substrate under said HEMT and adjacent an anode of said Schottky diode; c. a low resistance layer disposed over said common substrate, the low resistance layer having openings therein under said HEMT and under said Schottky diode, the opening therein under said HEMT having sidewalls which immediately abut sidewalls of said 2DEG channel layer disposed on said common substrate under said HEMT and the opening therein under said Schottky diode having sidewalls which immediately abut sidewalls of said 2DEG channel layer disposed on said common substrate in said opening under said Schottky diode, the 2DEG channel layer disposed on said common substrate in said opening under said Schottky diode having further sidewalls which abut said anode; d. a top barrier layer disposed over said low resistance layer; e. a T-shaped gate, the T-shaped gate having a leg disposed over said top barrier layer and over the 2DEG channel layer disposed on said common substrate under said HEMT; f. drain and source electrodes disposed on said low resistance layer and spaced from said T-shaped gate; and g. one or more cathode electrodes disposed on said low resistance layer and spaced from said anode.
地址 Malibu CA US