发明名称 半導体集積回路装置およびその製造方法
摘要 <p>A bulk & SOI hybrid CMIS device, in which an I/O bulk part and a core logic SOI part are mounted, needs a number of gate stacks to optimize threshold voltage control and causes a problem that the process and structure become complicated. The present invention adjusts the threshold voltage of MISFET at the corresponding part by introducing impurities into any of back gate semiconductor regions, in an SOI semiconductor CMISFET integrated circuit device having a high-k gate insulating film and a metal gate electrode.</p>
申请公布号 JP5661445(B2) 申请公布日期 2015.01.28
申请号 JP20100277993 申请日期 2010.12.14
申请人 发明人
分类号 H01L29/786;H01L21/336;H01L21/8238;H01L27/08;H01L27/092 主分类号 H01L29/786
代理机构 代理人
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