发明名称 SEMICONDUCTOR SUBSTRATE HAVING STRESS-ABSORBING SURFACE LAYER
摘要 An assembly (101) comprising a semiconductor device (110) with solderable bumps (112); a substrate (120) with a layer (130) of a first insulating compound and an underlying metal layer (140) patterned in contact pads (141) and connecting traces (142), the insulating layer having openings (132) to expose the surface (142a) and sidewalls (142b) of underlying traces; the device bumps soldered onto the contact pads, establishing a gap (150) between device and top insulating layer; and a second insulating compound (160) cohesively filling the gap and the second openings, thereby touching the underlying traces, the second insulating compound having a higher glass transition temperature, a higher modulus, and a lower coefficient of thermal expansion than the first insulating compound.
申请公布号 US2015021762(A1) 申请公布日期 2015.01.22
申请号 US201414333553 申请日期 2014.07.17
申请人 Texas Instruments Incorporated 发明人 Williamson Jaimal M.;Shahidi Nima;Arroyo Jose Carlos
分类号 H01L23/00 主分类号 H01L23/00
代理机构 代理人
主权项 1. A semiconductor assembly comprising: a semiconductor device having terminals with solderable metal bumps; a flat substrate having a top layer of a first insulating compound and an underlying metal layer patterned in contact pads and connecting traces, the insulating layer having first openings to expose underlying contact pads and second openings to expose underlying connecting traces; the device assembled on the substrate wherein the device bumps are soldered through the first openings onto the contact pads, thereby establishing a gap between the device and the top insulating layer; and a second insulating compound cohesively filling the gap and the second openings, thereby touching the underlying connecting traces, the second insulating compound having a higher glass transition temperature (Tg), a higher modulus, and a lower coefficient of thermal expansion (CTE) than the first insulating compound.
地址 Dallas TX US