发明名称 |
Memory Cell Comprising First and Second Transistors and Methods of Operating |
摘要 |
Semiconductor memory cells, array and methods of operating are disclosed. In one instance, a memory cell includes a bi-stable floating body transistor and an access device; wherein the bi-stable floating body transistor and the access device are electrically connected in series. |
申请公布号 |
US2015023105(A1) |
申请公布日期 |
2015.01.22 |
申请号 |
US201314380779 |
申请日期 |
2013.02.15 |
申请人 |
Zeno Semiconductor, Inc. |
发明人 |
Widjaja Yuniarto;Han Jin-Woo;Louie Benjamin S. |
分类号 |
G11C16/04;H01L27/115;G11C16/10 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
1. A semiconductor memory cell comprising:
a bi-stable floating body transistor; and an access device; wherein said bi-stable floating body transistor and said access device are electrically connected in series. |
地址 |
Cupertino CA US |