Methods for Forming STI Regions in Integrated Circuits

摘要

A first Fin Field-Effect Transistor (FinFET) and a second FinFET are adjacent to each other. Each of the first FinFET and the second FinFET includes a semiconductor fin, a gate dielectric on sidewalls and a top surface of the semiconductor fin, and a gate electrode over the gate dielectric. The semiconductor fin of the first FinFET and the semiconductor fin of the second FinFET are aligned to a straight line. An isolation region is aligned to the straight line, wherein the isolation region includes a portion at a same level as the semiconductor fins of the first FinFET and the second FinFET. A continuous straight semiconductor strip is overlapped by the semiconductor fins of the first FinFET and the second FinFET. A Shallow Trench Isolation (STI) region is on a side of, and contacts, the semiconductor strip. The isolation region and the first STI region form a distinguishable interface.

主权项

1. An integrated circuit structure comprising:
A first Fin Field-Effect Transistor (FinFET) and a second FinFET adjacent to each other, wherein each of the first FinFET and the second FinFET comprises:
a semiconductor fin;a gate dielectric on sidewalls and a top surface of the semiconductor fin; anda gate electrode over the gate dielectric, wherein the semiconductor fin of the first FinFET and the semiconductor fin of the second FinFET are aligned to a straight line; an isolation region aligned to the straight line, wherein the isolation region comprises a portion at a same level as the semiconductor fins of the first FinFET and the second FinFET; a continuous straight semiconductor strip overlapped by the semiconductor fins of the first FinFET and the second FinFET; and a first Shallow Trench Isolation (STI) region on a side of, and contacting, the semiconductor strip, wherein the isolation region and the first STI region form a distinguishable interface.