发明名称 MEMORY CONTROLLER AND MEMORY CONTROL METHOD
摘要 <p>PROBLEM TO BE SOLVED: To provide a memory controller capable of executing sequence control at high speed.SOLUTION: A bit operation table storage unit 10 holds the result of bitwise logical operation as a table in advance. A lookup table unit 19 holds one table of the bit operation table storage unit 10. A data latch unit 17 latches bit data extracted by a bit extraction/insertion unit 16, and a bit selector unit 18 selects one bit from the table held in the lookup table unit 19 in accordance with output of the bit data latched by the data latch unit 17. A read/write control unit 20 exerts control for writing back, to a device memory 6, word data in which one bit among word data read out from the device memory 6 after a write to the device memory 6 is replaced with the one bit outputted by the bit selector unit 18.</p>
申请公布号 JP2015014934(A) 申请公布日期 2015.01.22
申请号 JP20130141563 申请日期 2013.07.05
申请人 MITSUBISHI ELECTRIC CORP 发明人 SASAKI TORU
分类号 G05B19/05 主分类号 G05B19/05
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